Raymond Toy pushed to branch issue-284-optimize-signed-byte-32-int-len-vop at cmucl / cmucl
Commits:
4ffad32e by Raymond Toy at 2024-03-22T13:08:11-07:00
Optimize unsigned-byte-32-int-len some more
Take advantage of the fact that BSR actually moves the src to the dst
register when the src is 0. The Intel docs don't says this, but gcc,
LLVM, and MSVC compilers basically assume this when generating code
that uses BSR.
- - - - -
1 changed file:
- src/compiler/x86/arith.lisp
Changes:
=====================================
src/compiler/x86/arith.lisp
=====================================
@@ -760,12 +760,11 @@
(:results (res :scs (any-reg)))
(:result-types positive-fixnum)
(:generator 30
- (move res arg)
;; The Intel docs say that BSR leaves the destination register
- ;; undefined if the source is 0. But AMD64 says the destination
- ;; register is unchanged. This also appears to be the case for
- ;; GCC and LLVM.
- (inst bsr res res)
+ ;; undefined if the source is 0. However, gcc, LLVM, and MSVC
+ ;; generate code that pretty much says BSR basically moves the
+ ;; source to the destination if the source is 0.
+ (inst bsr res arg)
(inst jmp :z DONE)
;; The result of BSR is one too small for what we want, so
;; increment the result.
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Raymond Toy pushed to branch issue-284-optimize-signed-byte-32-int-len-vop at cmucl / cmucl
Commits:
b68de43f by Raymond Toy at 2024-03-22T10:02:07-07:00
Remove comment to rtfm for signed-byte-32-len
Not sure what the comment is referring too. It came in the huge
commit [c0c98ded6c]. I think the implementation is correct.
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1 changed file:
- src/compiler/x86/arith.lisp
Changes:
=====================================
src/compiler/x86/arith.lisp
=====================================
@@ -731,7 +731,6 @@
DONE))
-;;; note documentation for this function is wrong - rtfm
(define-vop (signed-byte-32-len)
(:translate integer-length)
(:note _N"inline (signed-byte 32) integer-length")
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Raymond Toy pushed to branch issue-284-optimize-signed-byte-32-int-len-vop at cmucl / cmucl
Commits:
274feae4 by Raymond Toy at 2024-03-22T09:58:37-07:00
Update release notes for #284
- - - - -
1 changed file:
- src/general-info/release-21f.md
Changes:
=====================================
src/general-info/release-21f.md
=====================================
@@ -61,6 +61,7 @@ public domain.
least-positive-float
* ~~#278~~ Add some more debugging prints to gencgc
* ~~#283~~ Add VOP for `integer-length` for `(unsigned-byte 32)` arg.
+ * ~~#284~~ Microoptimize `signed-byte-32-int-len` VOP for x86.
* Other changes:
* Improvements to the PCL implementation of CLOS:
* Changes to building procedure:
View it on GitLab: https://gitlab.common-lisp.net/cmucl/cmucl/-/commit/274feae4e9922e319b1e1c9…
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Raymond Toy pushed to branch master at cmucl / cmucl
Commits:
62c23d27 by Raymond Toy at 2024-03-22T09:14:28-07:00
Checkout ansi-tests cmucl-expected-failures again
Issue https://gitlab.common-lisp.net/cmucl/cmucl/-/issues/276 has
landed and we've merged the ansi-test branch issue-276-xoroshiro to
cmucl-expected-failures. Thus, we can check out
cmucl-expected-failures again for running ansi-tests.
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1 changed file:
- bin/run-ansi-tests.sh
Changes:
=====================================
bin/run-ansi-tests.sh
=====================================
@@ -41,7 +41,7 @@ else
fi
cd ../ansi-test
-git checkout issue-276-xoroshiro
+git checkout cmucl-expected-failures
make LISP="$LISP batch -noinit -nositeinit"
# There should be no unexpected successes or failures; check these separately
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Raymond Toy pushed to branch master at cmucl / cmucl
Commits:
453f2c86 by Raymond Toy at 2024-03-22T09:12:33-07:00
Update release notes for #283
Forgot to update release notes after fixing #283.
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1 changed file:
- src/general-info/release-21f.md
Changes:
=====================================
src/general-info/release-21f.md
=====================================
@@ -60,6 +60,7 @@ public domain.
* ~~#277~~ `float-ratio-float` returns 0 for numbers close to
least-positive-float
* ~~#278~~ Add some more debugging prints to gencgc
+ * ~~#283~~ Add VOP for `integer-length` for `(unsigned-byte 32)` arg.
* Other changes:
* Improvements to the PCL implementation of CLOS:
* Changes to building procedure:
View it on GitLab: https://gitlab.common-lisp.net/cmucl/cmucl/-/commit/453f2c866544fa5f113ab9a…
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Raymond Toy pushed to branch master at cmucl / cmucl
Commits:
45d30576 by Raymond Toy at 2024-03-22T15:15:57+00:00
Fix #283: Add VOP for integer-length for an (unsigned-byte 32) arg
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4d33af09 by Raymond Toy at 2024-03-22T15:15:58+00:00
Merge branch 'issue-283-unsigned-integer-length-vop' into 'master'
Fix #283: Add VOP for integer-length for an (unsigned-byte 32) arg
Closes #283
See merge request cmucl/cmucl!194
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2 changed files:
- src/compiler/x86/arith.lisp
- src/i18n/locale/cmucl-x86-vm.pot
Changes:
=====================================
src/compiler/x86/arith.lisp
=====================================
@@ -755,6 +755,28 @@
(inst xor res res)
DONE))
+(define-vop (unsigned-byte-32-len)
+ (:translate integer-length)
+ (:note _N"inline (unsigned-byte 32) integer-length")
+ (:policy :fast-safe)
+ (:args (arg :scs (unsigned-reg)))
+ (:arg-types unsigned-num)
+ (:results (res :scs (any-reg)))
+ (:result-types positive-fixnum)
+ (:generator 30
+ (move res arg)
+ ;; The Intel docs say that BSR leaves the destination register
+ ;; undefined if the source is 0. But AMD64 says the destination
+ ;; register is unchanged. This also appears to be the case for
+ ;; GCC and LLVM.
+ (inst bsr res res)
+ (inst jmp :z DONE)
+ ;; The result of BSR is one too small for what we want, so
+ ;; increment the result.
+ (inst inc res)
+ (inst shl res 2)
+ DONE))
+
(define-vop (unsigned-byte-32-count)
(:translate logcount)
(:note _N"inline (unsigned-byte 32) logcount")
=====================================
src/i18n/locale/cmucl-x86-vm.pot
=====================================
@@ -296,6 +296,10 @@ msgstr ""
msgid "inline (signed-byte 32) integer-length"
msgstr ""
+#: src/compiler/x86/arith.lisp
+msgid "inline (unsigned-byte 32) integer-length"
+msgstr ""
+
#: src/compiler/x86/arith.lisp
msgid "inline (unsigned-byte 32) logcount"
msgstr ""
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Raymond Toy pushed to branch issue-283-unsigned-integer-length-vop at cmucl / cmucl
Commits:
8bf5b284 by Raymond Toy at 2024-03-22T07:56:03-07:00
Use ZF flag for the 0 case
Instead of explicitly testing for 0, using the ZF flag after the `BSR`
instruction which is set to true if the source is 0.
We also assume that `BSR` in this case leaves the destination
unchanged even though the Intel docs say the result is undefined in
this case, but the AMD docs say it is unchanged. See !194 for more
references that say this is true for Intel too.
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1 changed file:
- src/compiler/x86/arith.lisp
Changes:
=====================================
src/compiler/x86/arith.lisp
=====================================
@@ -765,10 +765,12 @@
(:result-types positive-fixnum)
(:generator 30
(move res arg)
- ;; BSR is undefined if the source is 0, so check for that here.
- (inst cmp res 0)
- (inst jmp :eq DONE)
+ ;; The Intel docs say that BSR leaves the destination register
+ ;; undefined if the source is 0. But AMD64 says the destination
+ ;; register is unchanged. This also appears to be the case for
+ ;; GCC and LLVM.
(inst bsr res res)
+ (inst jmp :z DONE)
;; The result of BSR is one too small for what we want, so
;; increment the result.
(inst inc res)
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