Raymond Toy pushed to branch issue-97-define-ud2-inst at cmucl / cmucl
Commits:
064c1aa6 by Raymond Toy at 2021-05-21T16:26:46-07:00
Add comments to interface functions.
- - - - -
1 changed file:
- src/lisp/arch.h
Changes:
=====================================
src/lisp/arch.h
=====================================
@@ -18,10 +18,27 @@ extern boolean arch_pseudo_atomic_atomic(os_context_t * scp);
extern void arch_set_pseudo_atomic_interrupted(os_context_t * scp);
extern os_vm_address_t arch_get_bad_addr(HANDLER_ARGS);
extern unsigned char *arch_internal_error_arguments(os_context_t * scp);
+
+/*
+ * Install an architecture-dependent breakpoint instruction at the
+ * given PC address. This also returns the bytes that were
+ * overwritten by the breakpoint instruction so that the original
+ * instruction can be restored once the breakpoint has been handled.
+ */
extern unsigned long arch_install_breakpoint(void *pc);
+
extern void arch_remove_breakpoint(void *pc, unsigned long orig_inst);
extern void arch_install_interrupt_handlers(void);
+
+/*
+ * This is called when we need to continue after a breakpoint. The
+ * original instruction in |orig_inst| is put back. Then things are
+ * set up so that we can run again and after this instruction is run,
+ * we trap again so that the original breakpoint can be replaced. How
+ * this is done is architecture-dependent.
+ */
extern void arch_do_displaced_inst(os_context_t * scp, unsigned long orig_inst);
+
extern lispobj funcall0(lispobj function);
extern lispobj funcall1(lispobj function, lispobj arg0);
extern lispobj funcall2(lispobj function, lispobj arg0, lispobj arg1);
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Raymond Toy pushed to branch issue-97-define-ud2-inst at cmucl / cmucl
Commits:
9c5cdf07 by Raymond Toy at 2021-05-20T21:18:44-07:00
Define separate int and int3 instructions.
Note that `(inst int 3)` is two bytes long and is not converted to an
int3 instruction that is one byte long.
Tested by looking at the output of
`disassem::print-backend-inst-space` and also by inserting a
function-start breakpoint in `#'kernel:%sqrt` and disassembling the
function. We see the `int3` instruction, and it is exactly one byte
long.
- - - - -
1 changed file:
- src/compiler/x86/insts.lisp
Changes:
=====================================
src/compiler/x86/insts.lisp
=====================================
@@ -2161,15 +2161,14 @@
(define-instruction int (segment number)
(:declare (type (unsigned-byte 8) number))
(:printer byte-imm ((op #b11001101)))
- (:printer byte ((op #b11001100))
- `(:name 3))
- (:emitter
- (etypecase number
- ((member 3)
- (emit-byte segment #b11001100))
- ((unsigned-byte 8)
- (emit-byte segment #b11001101)
- (emit-byte segment number)))))
+ (:emitter
+ (emit-byte segment #b11001101)
+ (emit-byte segment number)))
+
+(define-instruction int3 (segment)
+ (:printer byte ((op #b11001100)))
+ (:emitter
+ (emit-byte segment #b11001100)))
(define-instruction into (segment)
(:printer byte ((op #b11001110)))
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Raymond Toy pushed to branch master at cmucl / cmucl
Commits:
cb529aaf by Raymond Toy at 2021-05-08T22:12:59+00:00
Address #89: Clean up page flags
- - - - -
2589cd0c by Raymond Toy at 2021-05-08T22:13:00+00:00
Merge branch 'issue-89-update-page-flags' into 'master'
Address #89: Clean up page flags
See merge request cmucl/cmucl!61
- - - - -
1 changed file:
- src/lisp/gencgc.h
Changes:
=====================================
src/lisp/gencgc.h
=====================================
@@ -35,13 +35,39 @@ int gc_write_barrier(void *);
*/
#define PAGE_NEEDS_ZEROING_MARKER 0xdead0000
+/*
+ * The various fields packed into the struct page flags member.
+ */
+
+/*
+ * The generation that this page belongs to. This should be valid for
+ * all pages that may have objects allocated, even current allocation
+ * region pages - this allows the space of an object to be easily
+ * determined.
+ */
+
+#define PAGE_GENERATION_MASK 0x0000000f
+#define PAGE_GENERATION(page) \
+ (page_table[page].flags & PAGE_GENERATION_MASK)
+
+#define PAGE_FLAGS(page, mask) (page_table[page].flags & (mask))
+#define PAGE_FLAGS_UPDATE(page, mmask, mflags) \
+ (page_table[page].flags = (page_table[page].flags & ~(mmask)) | (mflags))
+
+
+/*
+ * After the generation, we have a set of bits. This defines the
+ * location of the first of the bit fields.
+ */
+#define PAGE_BASE_BIT_SHIFT 4
+
/*
* Set when the page is write protected. If it is writen into it is
* made writable and this flag is cleared. This should always reflect
* the actual write_protect status of a page.
*/
-#define PAGE_WRITE_PROTECTED_MASK 0x00000010
+#define PAGE_WRITE_PROTECTED_MASK (1 << PAGE_BASE_BIT_SHIFT)
#define PAGE_WRITE_PROTECTED(page) \
(page_table[page].flags & PAGE_WRITE_PROTECTED_MASK)
@@ -51,14 +77,14 @@ int gc_write_barrier(void *);
* the bytes_used must be 0.
*/
-#define PAGE_ALLOCATED_MASK 0x00000040
+#define PAGE_ALLOCATED_MASK (1 << (PAGE_BASE_BIT_SHIFT + 1))
#define PAGE_ALLOCATED(page) (page_table[page].flags & PAGE_ALLOCATED_MASK)
/*
* Unboxed region flag: 1 for unboxed objects, 0 for boxed objects.
*/
-#define PAGE_UNBOXED_MASK 0x00000080
-#define PAGE_UNBOXED_SHIFT 7
+#define PAGE_UNBOXED_SHIFT (PAGE_BASE_BIT_SHIFT + 2)
+#define PAGE_UNBOXED_MASK (1 << PAGE_UNBOXED_SHIFT)
#define PAGE_UNBOXED(page) (page_table[page].flags & PAGE_UNBOXED_MASK)
#define PAGE_UNBOXED_VAL(page) (PAGE_UNBOXED(page) >> PAGE_UNBOXED_SHIFT)
@@ -67,7 +93,7 @@ int gc_write_barrier(void *);
* set. It's only valid during a GC for allocated pages.
*/
-#define PAGE_DONT_MOVE_MASK 0x00000100
+#define PAGE_DONT_MOVE_MASK (1 << (PAGE_BASE_BIT_SHIFT + 3))
#define PAGE_DONT_MOVE(page) \
(page_table[page].flags & PAGE_DONT_MOVE_MASK)
@@ -77,28 +103,13 @@ int gc_write_barrier(void *);
* valid when the page is allocated.
*/
-#define PAGE_LARGE_OBJECT_MASK 0x00000200
-#define PAGE_LARGE_OBJECT_SHIFT 9
+#define PAGE_LARGE_OBJECT_SHIFT (PAGE_BASE_BIT_SHIFT + 4)
+#define PAGE_LARGE_OBJECT_MASK (1 << PAGE_LARGE_OBJECT_SHIFT)
#define PAGE_LARGE_OBJECT(page) \
(page_table[page].flags & PAGE_LARGE_OBJECT_MASK)
#define PAGE_LARGE_OBJECT_VAL(page) \
(PAGE_LARGE_OBJECT(page) >> PAGE_LARGE_OBJECT_SHIFT)
-/*
- * The generation that this page belongs to. This should be valid for
- * all pages that may have objects allocated, even current allocation
- * region pages - this allows the space of an object to be easily
- * determined.
- */
-
-#define PAGE_GENERATION_MASK 0x0000000f
-#define PAGE_GENERATION(page) \
- (page_table[page].flags & PAGE_GENERATION_MASK)
-
-#define PAGE_FLAGS(page, mask) (page_table[page].flags & (mask))
-#define PAGE_FLAGS_UPDATE(page, mmask, mflags) \
- (page_table[page].flags = (page_table[page].flags & ~(mmask)) | (mflags))
-
struct page {
/*
* Page flags.
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Raymond Toy pushed to branch master at cmucl / cmucl
Commits:
6dc68de2 by Raymond Toy at 2021-05-07T08:00:04-07:00
Fix #107: Use uint8_t instead of u_int8_t.
Use the C standard type `uint8_t` instead of `u_int8_t`.
- - - - -
545c960d by Raymond Toy at 2021-05-07T15:17:34+00:00
Merge branch 'issue-107-use-uint8_t' into 'master'
Fix #107: Use uint8_t instead of u_int8_t.
Closes #107
See merge request cmucl/cmucl!76
- - - - -
1 changed file:
- src/lisp/x86-arch.h
Changes:
=====================================
src/lisp/x86-arch.h
=====================================
@@ -6,6 +6,8 @@
*/
#ifndef __X86_ARCH_H
+#include <stdint.h>
+
extern int arch_support_sse2(void);
extern boolean os_support_sse2(void);
@@ -25,6 +27,6 @@ extern boolean os_support_sse2(void);
* Just use the SSE size for both x87 and sse2 since the SSE size is
* enough for either. Make sure it's on a 16-byte boundary.
*/
-#define FPU_STATE(name) u_int8_t name[SSE_STATE_SIZE] __attribute__((aligned(16)))
+#define FPU_STATE(name) uint8_t name[SSE_STATE_SIZE] __attribute__((aligned(16)))
#endif
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Raymond Toy pushed to branch issue-97-define-ud2-inst at cmucl / cmucl
Commits:
cb189a54 by Raymond Toy at 2021-04-21T16:41:54-07:00
Address more review comments
* Replace 63 with 0x3f
* Update comment about checking for UD1. We don't abort anymore if
it's not; we just call interrupt_handle_now like we do on other
ports.
- - - - -
1 changed file:
- src/lisp/x86-arch.c
Changes:
=====================================
src/lisp/x86-arch.c
=====================================
@@ -379,12 +379,9 @@ sigill_handler(HANDLER_ARGS)
(stderr, "pc %x\n", *(unsigned short *)SC_PC(context)));
/*
- * Make sure the trapping instruction is UD1. Abort if not.
- *
- * TODO: aborting is probably not the best idea. Could get here
- * from other illegal instructions in, say, C code? Maybe we
- * should call interrupt_handle_now, as we do below for an unknown
- * trap code?
+ * If the trapping instruction is UD1, assume it's a Lisp trap
+ * that we handle here. Otherwise, just call interrupt_handle_now
+ * for other cases.
*/
if (memcmp((void *)SC_PC(context), ud1, sizeof(ud1)) == 0) {
/*
@@ -392,7 +389,7 @@ sigill_handler(HANDLER_ARGS)
* number is placed in the low 6-bits of the 3rd byte of the
* instruction.
*/
- trap = *(((char *)SC_PC(context)) + 2) & 63;
+ trap = *(((char *)SC_PC(context)) + 2) & 0x3f;
DPRINTF(debug_handlers, (stderr, "code = %x\n", trap));
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Raymond Toy pushed to branch issue-97-define-ud2-inst at cmucl / cmucl
Commits:
7e2339c4 by Raymond Toy at 2021-04-13T22:43:12-07:00
Make int3 inst print out as int3
Previously, the instruction was printed as "int 3", but now it prints
as "int3" as we would expect.
(But note that the Solaris assembler doesn't like int3; you have to
use "int 3".)
- - - - -
1 changed file:
- src/compiler/x86/insts.lisp
Changes:
=====================================
src/compiler/x86/insts.lisp
=====================================
@@ -2164,7 +2164,7 @@
(:declare (type (unsigned-byte 8) number))
(:printer byte-imm ((op #b11001101)))
(:printer byte ((op #b11001100))
- `(:name :tab 3))
+ `(:name 3))
(:emitter
(etypecase number
((member 3)
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Raymond Toy pushed to branch issue-97-define-ud2-inst at cmucl / cmucl
Commits:
ae94d97a by Raymond Toy at 2021-04-13T22:34:46-07:00
Update the int instruction to disassemble int3
The int instruction would accept a code of 3 but would produce an int3
instruction. However, the disassembly of this wasn't working since
the printer expected the opcode to be #b11001101 which didn't match
what was generated. Hence, add a new printer to print int3 as "int
3".
Tested this by setting a breakpoint and disassembling the function to
see that the breakpoint is printed as "int 3" instead ".byte #xcc".
(Should we really make a separate int3 instruction?)
- - - - -
1 changed file:
- src/compiler/x86/insts.lisp
Changes:
=====================================
src/compiler/x86/insts.lisp
=====================================
@@ -2154,9 +2154,17 @@
(ldb (byte 3 3) code)
(ldb (byte 3 0) code))))
+;; Handles both int and int3. To get int3 you have to say (inst int
+;; 3). But int3 should not be used in Lisp code. This is mainly so
+;; that int3 gets disassembled correctly if a breakpoint has been set
+;; in Lisp code. (But in general the disassembly will be messed up
+;; because the following byte will in general be the second byte of
+;; some instruction, and not the first byte of an instruction.)
(define-instruction int (segment number)
(:declare (type (unsigned-byte 8) number))
(:printer byte-imm ((op #b11001101)))
+ (:printer byte ((op #b11001100))
+ `(:name :tab 3))
(:emitter
(etypecase number
((member 3)
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Raymond Toy pushed to branch issue-97-define-ud2-inst at cmucl / cmucl
Commits:
5ad11929 by Raymond Toy at 2021-04-13T22:16:26-07:00
Clean up comment and impl
In the description of the ud1 format, mention why we can't use
ext-reg-reg/mem even though it looks very much like what the ud1
format is.
In x86-arch.c, fix typo in arch_install_breakpoint that was setting
the result incorrectly (and caused a compiler warning).
- - - - -
2 changed files:
- src/compiler/x86/insts.lisp
- src/lisp/x86-arch.c
Changes:
=====================================
src/compiler/x86/insts.lisp
=====================================
@@ -2064,9 +2064,13 @@
;; The UD1 instruction. The mod bits of the mod r/m byte MUST be #b11
;; so that the reg/mem field is actually a register. This is a hack
-;; to allow us to print out the reg/mem reg as a 32-bit reg. Using
-;; just reg/mem, the register sometimes printed out as a byte reg and
-;; I (toy.raymond) don't know why.
+;; to allow us to print out the reg/mem reg as a 32-bit reg.
+;;
+;; While the instruction looks like an ext-reg-reg/mem format with
+;; fixed width value of 1, it isn't because we need to disassemble the
+;; reg/mem field as a 32-bit reg. ext-reg-reg/mem needs a width prefix
+;; byte to specify that, and we definitely don't want that. Hence,
+;; use a special instruction format for the UD1 instruction.
(disassem:define-instruction-format
(ud1 24 :default-printer '(:name :tab reg ", " reg/mem))
(prefix :field (byte 8 0) :value #b00001111)
=====================================
src/lisp/x86-arch.c
=====================================
@@ -220,13 +220,13 @@ arch_set_pseudo_atomic_interrupted(os_context_t * context)
unsigned long
arch_install_breakpoint(void *pc)
{
- unsigned long result = (unsigned char *) pc;
+ unsigned long result = *(unsigned char *) pc;
+ *(unsigned char *) pc = BREAKPOINT_INST;
DPRINTF(debug_handlers,
(stderr, "arch_install_breakpoint at %p, old code = 0x%lx\n",
pc, result));
- *(unsigned char *) pc = BREAKPOINT_INST;
return result;
}
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