Raymond Toy pushed to branch issue-97-define-ud2-inst at cmucl / cmucl
Commits:
-
5ad11929
by Raymond Toy at 2021-04-13T22:16:26-07:00
2 changed files:
Changes:
... | ... | @@ -2064,9 +2064,13 @@ |
2064 | 2064 |
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2065 | 2065 |
;; The UD1 instruction. The mod bits of the mod r/m byte MUST be #b11
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2066 | 2066 |
;; so that the reg/mem field is actually a register. This is a hack
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-;; to allow us to print out the reg/mem reg as a 32-bit reg. Using
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-;; just reg/mem, the register sometimes printed out as a byte reg and
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-;; I (toy.raymond) don't know why.
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+;; to allow us to print out the reg/mem reg as a 32-bit reg.
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+;;
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+;; While the instruction looks like an ext-reg-reg/mem format with
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+;; fixed width value of 1, it isn't because we need to disassemble the
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+;; reg/mem field as a 32-bit reg. ext-reg-reg/mem needs a width prefix
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+;; byte to specify that, and we definitely don't want that. Hence,
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+;; use a special instruction format for the UD1 instruction.
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2070 | 2074 |
(disassem:define-instruction-format
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(ud1 24 :default-printer '(:name :tab reg ", " reg/mem))
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(prefix :field (byte 8 0) :value #b00001111)
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... | ... | @@ -220,13 +220,13 @@ arch_set_pseudo_atomic_interrupted(os_context_t * context) |
220 | 220 |
unsigned long
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221 | 221 |
arch_install_breakpoint(void *pc)
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{
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- unsigned long result = (unsigned char *) pc;
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+ unsigned long result = *(unsigned char *) pc;
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+ *(unsigned char *) pc = BREAKPOINT_INST;
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224 | 225 |
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DPRINTF(debug_handlers,
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(stderr, "arch_install_breakpoint at %p, old code = 0x%lx\n",
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227 | 228 |
pc, result));
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228 | 229 |
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- *(unsigned char *) pc = BREAKPOINT_INST;
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return result;
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231 | 231 |
}
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232 | 232 |
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